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GCSE Student Booster - Systems Architecture (Post-event materials)
In this online session you will have learned about GCSE Systems Architecture. The session was aimed at GCSE students in Year 9 to 11. The event discussed the components of the CPU, registers and buses. It also showed the fetch, decode, cycle used by the processor. It taught the key factors that affect the speed of the CPU.
By attending this event, you will have:
- identified the steps of the von Neumann Architecture
- explained how the fetch – decode – execute cycle is used in the CPU
- discussed the factors that can affect the performance of the CPU
- identified the difference between RAM and ROM
These materials are shared only with Isaac Computer Science Booster participants in accordance with the Isaac Computer Science Terms of Use policy here: https://isaaccomputerscience.org/terms?examBoard=all&stage=all
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Handout 2 - FDE Cycle solution.docx 239.14 KB
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Handout 2 - FDE Cycle.docx 238.42 KB
Download all files as a .zip1.32 MB
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