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GCSE Student Booster - Systems Architecture (Pre-event materials)
In this online session you will learn about GCSE Systems Architecture. The session is aimed at GCSE students in Year 9 to 11. The event discusses the components of the CPU, registers and buses. It also shows the fetch, decode, cycle used by the processor. It teaches the key factors that affect the speed of the CPU.
By attending this event, you will:
- identify the steps of the von Neumann Architecture
- explain how the fetch – decode – execute cycle is used in the CPU
- discuss the factors that can affect the performance of the CPU
- identify the difference between RAM and ROM
These materials are shared only with Isaac Computer Science Booster participants in accordance with the Isaac Computer Science Terms of Use policy here: https://isaaccomputerscience.org/terms?examBoard=all&stage=all
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Handout 2 - FDE Cycle.docx 238.42 KB
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Handout 2 - FDE Cycle.docx 238.42 KB
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